This invention pertains generally to the field of high performance switching, including switches, networks and interconnect and addressing techniques suitable for implementing very high performance switching functions such as those defined in the Fibre Channel standards.
There is an ever increasing need in the fields of computing and data handling for switches and devices for use in data handling environments which are capable of the highest performance in terms of bandwidth and switching flexibility. Examples include interconnecting computers and high-performance storage devices, interconnecting computers in a multiple-computer operating environment, and anywhere else where multiple high-speed data interconnections must be established between designated nodes or groups of nodes in a data handling network. The demands for size of interconnected networks, in terms of the numbers of nodes to be connected, and the amount of data bandwidth continue to increase, and these demands are only expected to accelerate in the future. These demands place great burdens on the requirements for switches or switching networks, and many switch topologies from the past cannot keep up with these demands.
To meet these growing needs, the Fibre Channel standard was developed and enacted as ANSI X3.T11. Various types of high performance switches or switch network devices have been developed and are available in the marketplace to at least partially implement certain Fibre Channel functions. The Fibre Channel standard itself is very forward-looking, in that it defines classes and standards of performance, but does not dictate the implementation technologies to be used in providing these functions. This is left in the standard as the fabric of the switch, and each potential implementer of a Fibre Channel switch is to design and develop its own switch fabric. At the time of enactment of the Fibre Channel standard many of the functions envisioned in the standard were not realizable, or were only realizable as specific subsets of the full Fibre Channel standard. Because of this, much of the promise of Fibre Channel remains unfulfilled.
To overcome these and other problems in the prior art, the present invention provides high performance switching networks and methodology for providing a practical implementation of Fibre Channel protocols.
According to one aspect of the invention, a two-dimensional Fibre Channel switched fabric is provided which combines a Fibre Channel Class 1 connection space-division multiplexing sub-fabric, and Class 2 and 3 connectionless space- and time-division multiplexing sub-fabric.
According to another aspect of the invention, there is provided an expandable multiport Fibre Channel standalone switch (for example, with 16 or 64 ports) which allows each fabric port to be used as a Fibre Channel F_Port, FL_Port or E_Port, depending on what device or devices are attached to it, with all Ports having access to both sub-fabrics.
According to another aspect of the invention, a switch module and methodology is provided for multiplying the number of user ports by combining modules into stages, so that, for example, a single stage can accommodate 64 user ports; a two-stage switch can accommodate 1026 user ports, and so on up to a five stage combination with 196,608 user ports.
Another aspect of the invention provides a Fibre Channel frame destination addressing methodology to support one, two, three and five stage topologies, as well as Fibre Channel arbitrated loop and alias functions.
Another aspect of the invention provides an addressing method for hardware routing of connectionless frames through the connectionless sub-fabric with minimum latency and maximum bandwidth.
Another aspect of the invention provides an addressing method for hardware routing Class 1 connect-request frames through the connectionless sub-fabric and setting up dedicated duplex connections at it goes, for minimum latency.
Still another aspect of the invention includes a method for hardware routing of Class 1 data frames through the connection sub-fabric for minimum latency and maximum bandwidth, with a hardware-managed Class 1 Disconnect function.
These and other features and advantages are provided with the present invention, as illustrated in the detailed descriptions of the preferred embodiments which follow.